Smart Energy-Efficient Clock Synthesizer for Duty-Cycled Sensor SoCs in 65 nm/28nm CMOS
Metadata only
Datum
2017-09Typ
- Journal Article
Publikationsstatus
publishedExterne Links
Zeitschrift / Serie
IEEE Transactions on Circuits and Systems I: Regular PapersBand
Seiten / Artikelnummer
Verlag
IEEEThema
wake-up event classification; all-digital FLL; IoT; Transient Clocking; clock synthesizer; fast start-up; dithering; jitter reductionOrganisationseinheit
03996 - Benini, Luca / Benini, Luca