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dc.contributor.author
Gran Alcoz, Albert
dc.contributor.author
Dietmüller, Alexander
dc.contributor.author
Vanbever, Laurent
dc.contributor.editor
Bhagwan, Ranjita
dc.contributor.editor
Porter, George
dc.date.accessioned
2020-10-21T09:14:29Z
dc.date.available
2020-10-21T09:14:29Z
dc.date.issued
2020
dc.identifier.isbn
978-1-939133-13-7
en_US
dc.identifier.uri
http://hdl.handle.net/20.500.11850/446995
dc.description.abstract
Push-In First-Out (PIFO) queues are hardware primitives which enable programmable packet scheduling by allowing to perfectly reorder packets at line rate. While promising, implementing PIFO queues in hardware and at scale is not easy: only hardware designs (not implementations) exist and they can only support about 1000 flows. In this paper, we introduce SP-PIFO, a programmable packet scheduler which closely approximates the behavior of PIFO queues using strict-priority queues—at line rate, at scale, and on existing devices. The key insight behind SP-PIFO is to dynamically adapt the mapping between packet ranks and available queues to minimize the scheduling errors. We present a mathematical formulation of the problem and derive an adaptation technique which closely approximates the optimal queue mapping without any traffic knowledge. We fully implement SP-PIFO in P4 and evaluate it on real workloads. We show that SP-PIFO: (i) closely matches ideal PIFO performance, with as little as 8 priority queues; (ii) arbitrarily scales to large amount of flows and ranks; and (iii) quickly adapts to traffic variations. We also show that SP-PIFO runs at line rate on existing programmable data planes.
en_US
dc.language.iso
en
en_US
dc.publisher
USENIX Association
en_US
dc.title
SP-PIFO: Approximating Push-In First-Out Behaviors using Strict-Priority Queues
en_US
dc.type
Conference Paper
ethz.book.title
Proceedings of the 17th USENIX Symposium on Networked Systems Design and Implementation
en_US
ethz.pages.start
59
en_US
ethz.pages.end
76
en_US
ethz.event
17th USENIX Symposium on Networked Systems Design and Implementation (NSDI 2020)
ethz.event.location
Santa Clara, CA, USA
en_US
ethz.event.date
February 25-27, 2020
en_US
ethz.identifier.wos
ethz.publication.place
Berkeley, CA
en_US
ethz.publication.status
published
en_US
ethz.leitzahl
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02640 - Inst. f. Technische Informatik und Komm. / Computer Eng. and Networks Lab.::09477 - Vanbever, Laurent / Vanbever, Laurent
en_US
ethz.leitzahl.certified
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02640 - Inst. f. Technische Informatik und Komm. / Computer Eng. and Networks Lab.::09477 - Vanbever, Laurent / Vanbever, Laurent
en_US
ethz.identifier.url
https://www.usenix.org/conference/nsdi20/presentation/alcoz
ethz.date.deposited
2020-08-26T09:20:11Z
ethz.source
FORM
ethz.source
WOS
ethz.eth
yes
en_US
ethz.availability
Metadata only
en_US
ethz.rosetta.installDate
2020-10-21T09:14:41Z
ethz.rosetta.lastUpdated
2023-02-06T20:35:42Z
ethz.rosetta.versionExported
true
dc.identifier.olduri
http://hdl.handle.net/20.500.11850/432702
dc.identifier.olduri
http://hdl.handle.net/20.500.11850/444922
ethz.COinS
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