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dc.contributor.author
Miedl, Philipp
dc.contributor.author
He, Xiaoxi
dc.contributor.author
Meyer, Matthias
dc.contributor.author
Bartolini, Davide B.
dc.contributor.author
Thiele, Lothar
dc.date.accessioned
2019-03-13T13:28:04Z
dc.date.available
2018-07-26T06:25:10Z
dc.date.available
2018-07-26T07:09:18Z
dc.date.available
2018-07-26T07:18:49Z
dc.date.available
2018-07-26T08:22:26Z
dc.date.available
2018-07-26T10:54:40Z
dc.date.available
2018-07-26T11:30:20Z
dc.date.available
2018-07-26T11:42:40Z
dc.date.available
2018-07-26T11:46:49Z
dc.date.available
2018-08-12T09:04:42Z
dc.date.available
2018-08-13T05:56:35Z
dc.date.available
2018-08-15T15:06:35Z
dc.date.available
2018-08-16T06:17:46Z
dc.date.available
2018-08-17T13:26:05Z
dc.date.available
2018-08-20T05:28:49Z
dc.date.available
2019-03-13T13:28:04Z
dc.date.issued
2018-11
dc.identifier.issn
0278-0070
dc.identifier.issn
1937-4151
dc.identifier.other
10.1109/TCAD.2018.2857038
en_US
dc.identifier.uri
http://hdl.handle.net/20.500.11850/278307
dc.identifier.doi
10.3929/ethz-b-000278307
dc.description.abstract
Most modern processors use Dynamic Voltage and Frequency Scaling (DVFS) for power management. DVFS allows to optimize power consumption by scaling voltage and frequency depending on performance demand. Previous research has indicated that this frequency scaling might pose a security threat in the form of a covert channel, which could leak sensitive information. However, an analysis able to determine whether DVFS is a serious security issue is still missing. In this paper, we conduct a detailed analysis of the threat potential of a DVFS-based covert channel. We investigate two multicore platforms representative of modern laptops and hand-held devices. Furthermore, we develop a channel model to determine an upper bound to the channel capacity, which is in the order of 1 bit per channel use. Last, we perform an experimental analysis using a novel transceiver implementation. The neural network based receiver yields packet error rates between 1% and 8% at average throughputs of up to 1.83 and 1.20 bits per second for platforms representative of laptops and hand-held devices, respectively. Considering the well-known small message criterion, our results show that a relevant covert channel can be established by exploiting the behaviour of computing systems with DVFS.
en_US
dc.format
application/pdf
en_US
dc.language.iso
en
en_US
dc.publisher
IEEE
en_US
dc.rights.uri
http://rightsstatements.org/page/InC-NC/1.0/
dc.subject
Covert Channel
en_US
dc.subject
DVFS
en_US
dc.subject
Neuronal networks
en_US
dc.subject
Data leakage
en_US
dc.title
Frequency Scaling as a Security Threat on Multicore Systems
en_US
dc.type
Conference Paper
dc.rights.license
In Copyright - Non-Commercial Use Permitted
dc.date.published
2018-07-18
ethz.journal.title
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ethz.journal.volume
37
en_US
ethz.journal.issue
11
en_US
ethz.journal.abbreviated
IEEE trans. comput.-aided des. integr. circuits syst.
ethz.pages.start
2497
en_US
ethz.pages.end
2508
en_US
ethz.version.deposit
acceptedVersion
en_US
ethz.event
International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2018) parallel to the Embedded Systems Week (ESWEEK 2018)
en_US
ethz.event.location
Torino, Italy
en_US
ethz.event.date
September 30 - October 5, 2018
en_US
ethz.identifier.wos
ethz.identifier.scopus
ethz.publication.place
New York, NY
en_US
ethz.publication.status
published
en_US
ethz.leitzahl
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02640 - Inst. f. Technische Informatik und Komm. / Computer Eng. and Networks Lab.
en_US
ethz.leitzahl
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02640 - Inst. f. Technische Informatik und Komm. / Computer Eng. and Networks Lab.::03429 - Thiele, Lothar (emeritus) / Thiele, Lothar (emeritus)
en_US
ethz.leitzahl.certified
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02640 - Inst. f. Technische Informatik und Komm. / Computer Eng. and Networks Lab.::03429 - Thiele, Lothar (emeritus) / Thiele, Lothar (emeritus)
ethz.relation.isSupplementedBy
10.3929/ethz-b-000292800
ethz.date.deposited
2018-07-26T06:25:12Z
ethz.source
FORM
ethz.eth
yes
en_US
ethz.availability
Open access
en_US
ethz.rosetta.installDate
2018-07-26T11:42:42Z
ethz.rosetta.lastUpdated
2023-02-06T16:56:16Z
ethz.rosetta.versionExported
true
ethz.COinS
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