Open access
Autor(in)
Datum
2023-02Typ
- Bachelor Thesis
ETH Bibliographie
yes
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Abstract
The ”Adaptive Compute Acceleration Platform” from AMD/Xilinx combines a classical FPGA part with a CGRA part, the so-called AI Engines, to open up new ways to increase the performance of powerful computers.
While ACAP based devices are now available for end users, it is still unclear what the actual capabilities of these devices are and how to use them most effectively. As the first step of this thesis, we examined the provided API and toolchain. We identified two mechanisms that are crucial for the performance of parallel applications. First, the communication between the AI Engines and the off-chip memory, and second the direct inter AI Engine communication. To perform various scientific benchmarks of the off-chip memory and the inter AI Engine communication the VCK190 Evaluation Kit from AMD/Xilinx was used. One part of the benchmarks focussed on the throughput of the communication between the AI Engines and the off-chip memory. The other part benchmarked the throughput of the inter AI Engine communication.
From the results, it is evident that the behaviour of the benchmarked communication mostly matches the manufacturer’s specifications. Nevertheless, there are unexplainable behaviour patterns that need further investigation.
The outlook shows that it might be interesting to benchmark the latencies of these communication methods in addition to the throughputs. Furthermore, it could be interesting to implement some additional communication APIs to improve the programmability of these AI Engines. Mehr anzeigen
Persistenter Link
https://doi.org/10.3929/ethz-b-000600880Publikationsstatus
publishedVerlag
ETH ZurichOrganisationseinheit
03950 - Hoefler, Torsten / Hoefler, Torsten
Zugehörige Publikationen und Daten
Is cited by: https://doi.org/10.3929/ethz-b-000635928
ETH Bibliographie
yes
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