A 0.8V, Sub-mW, Varactor-Tuning Ring-OscillatorBased Clock Generator in 32nm CMOS
dc.contributor.author
Liu, Jenlung
dc.contributor.author
Jeon, Sehyung
dc.contributor.author
Jang, Taekwang
dc.contributor.author
Kim, Dohyung
dc.contributor.author
Kim, Jihyun
dc.contributor.author
Park, Jaejin
dc.contributor.author
Park, Hojin
dc.date.accessioned
2019-03-21T09:24:33Z
dc.date.available
2019-03-20T11:18:01Z
dc.date.available
2019-03-21T08:36:41Z
dc.date.available
2019-03-21T08:37:52Z
dc.date.available
2019-03-21T09:24:33Z
dc.date.issued
2011
dc.identifier.other
10.1109/ASSCC.2011.6123582
en_US
dc.identifier.uri
http://hdl.handle.net/20.500.11850/332580
dc.language.iso
en
en_US
dc.publisher
IEEE
en_US
dc.title
A 0.8V, Sub-mW, Varactor-Tuning Ring-OscillatorBased Clock Generator in 32nm CMOS
en_US
dc.type
Conference Paper
dc.date.published
2012-01-09
ethz.book.title
IEEE Asian Solid-State Circuits Conference 2011
en_US
ethz.pages.start
337
en_US
ethz.pages.end
340
en_US
ethz.event
IEEE Asian Solid-State Circuits Conference (A-SSCC 2011)
en_US
ethz.event.location
Jeju, South Korea
en_US
ethz.event.date
November 14-16, 2011
en_US
ethz.publication.place
Piscataway, NJ
en_US
ethz.publication.status
published
en_US
ethz.leitzahl
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02636 - Institut für Integrierte Systeme / Integrated Systems Laboratory::09647 - Jang, Taekwang / Jang, Taekwang
en_US
ethz.leitzahl.certified
ETH Zürich::00002 - ETH Zürich::00012 - Lehre und Forschung::00007 - Departemente::02140 - Dep. Inf.technologie und Elektrotechnik / Dep. of Inform.Technol. Electrical Eng.::02636 - Institut für Integrierte Systeme / Integrated Systems Laboratory::09647 - Jang, Taekwang / Jang, Taekwang
ethz.date.deposited
2019-03-20T11:18:02Z
ethz.source
BATCH
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no
en_US
ethz.availability
Metadata only
en_US
ethz.rosetta.installDate
2019-03-21T08:36:49Z
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2019-03-21T09:24:37Z
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Conference Paper [35681]