A 9.5mW 4GHz WCDMA frequency synthesizer in 0.13μm CMOS

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Author
Chen, Xinhua
Huang, Qiuting
Date
2005-08
Type
    Conference Paper
Abstract
A 4GHz integer-N frequency synthesizer is realized in a 0.13μm CMOS technology. It has a 400kHz reference frequency and 40kHz loop bandwidth such that 2GHz quadrature LO signals can be generated after a divide-by-two, with channel raster of 200kHz. The measured in-band phase noise is -74dBc/Hz @4kH Show more
Publication status
published
External links
Book title
ISLPED’05: Proceedings of the 2005 International Symposium on Low Power Electronics and Design
Pages / Article No.
66 - 71
Publisher
Association for Computing Machinery
Event
10th International Symposium on Low Power Electronics and Design (ISLPED 2005), San Diego, CA, USA, August 8-10, 2005
Subject
WCDMA; Frequency synthesizer; Phase-locked loop; Low power; CMOS
Organisational unit
03380 - Huang, Qiuting (emeritus) / Huang, Qiuting (emeritus)  
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